SN54ABT657A, SN74ABT657A,pdf(O

The 'ABT657A transceivers have eight noninverting buffers with parity-generator/
checker circuits and control signals. The transmit/receive (T/R\) input determines the direction of data flow. When T/R\ is high, data flows from the A port to the B port (transmit mode); when T/R\ is low, data flows from the B port to the A port (receive mode). When the output-enable (OE\) input is high, both the A and B ports are in the high-impedance state.

Odd or even parity is selected by a logic high or low level on the ODD/EVEN\ input. PARITY carries the parity-bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode.

In the transmit mode, after the A bus is polled to determine the number of high bits, PARITY is set to the logic level that maintains the parity sense selected by the level at ODD/EVEN\.